An IGBT (Insulated Gate Bipolar Transistor) is known in which a MOS structure is provided in a surface face portion of a bipolar transistor. This type of semiconductor device is provided with a pair of electrodes and a gate electrode for turning on and turning off a current flowing between this pair of electrodes. When on-voltage is applied to the gate electrode, electron carriers are injected into a semiconductor region from one of the electrodes, and hole carriers are injected into the semiconductor region from the other of the electrodes. By this means, conductivity modulation occurs in the semiconductor region, and low on-voltage is realized.
Japanese Laid-Open Patent Publication H8 (1996)-316479 (see FIG. 3 in particular) sets forth a technique for reducing on-voltage (voltage between the electrodes when a voltage for turning on the semiconductor device is being applied to the trench gate).
The semiconductor device set forth in Japanese Laid-Open Patent Publication H8 (1996)-316479 is schematically shown in FIG. 17 (in the specification below, this configuration will be termed the conventional configuration). A semiconductor device 15 shown in FIG. 17 is provided with a trench gate 332 for turning on and off a current flowing between a pair of electrodes (in this case, an emitter electrode E and a collector electrode C).
The semiconductor device 15 is provided with: an n+ type emitter region 336 connected with the emitter electrode E, a p+ type body contact region 334 connected with the same emitter electrode E, a p− type body region 328 that surrounds the body contact region 334 and the emitter region 336, an n− type drift region 326 located below the body region 328, an n+ type buffer region 324 connected with the drift region 326, and a p+ type collector region 322 connected with the buffer region 324. The collector region 322 is connected with the collector electrode C.
A trench that extends to the drift region 326 passes through the emitter region 336 and the body region 328. A trench gate 332 is formed within this trench. This trench gate 332 is covered by a gate insulating layer 333, and faces, via this gate insulating layer 333, the body region 328 that isolates the emitter region 336 and the drift region 326.
An n+ type barrier region 340 is formed between the body region 328 and the drift region 326. The concentration of impurities in the barrier region 340 is higher than that of the drift region 326.
The semiconductor device shown in FIG. 17 comprises the electrode E, a top region 336, a deep region 326, a dense portion 334, and a main portion 328. The dense portion 334 and the main portion 328 have the same conductivity type and a common voltage, and may be collectively called an intermediate region. A portion of the intermediate region 328 isolates the top region 326 and the deep region 326. The semiconductor device 15 also comprises the trench gate 332 facing the portion of the intermediate region 328 via the insulating layer 333.
The operation of the semiconductor device 15 in an turned on state will be described. When the emitter electrode E is earthed, positive voltage is applied to the collector electrode C and to the trench gate 332, the portion of the body region 328 facing the trench gate 332 is then inverted to the n type and forms a channel. Thereupon, electron carriers are injected, via this channel that was inverted to the n type, from the emitter region 336 to the barrier region 340 and the drift region 326, and accumulate in the buffer region 324. When the electron carriers accumulate in the buffer region 324, the contact potential difference between the buffer region 324 and the collector region 322 decreases, and hole carriers are injected from the collector region 322 to the buffer region 324, the drift region 326, and the barrier region 340. By this means, conductivity modulation occurs in the buffer region 324, the drift region 326, and the barrier region 340, and low on-voltage is realized.
The hole carriers injected from the collector region 322 recombine with the electron carriers and disappear, or are discharged to the emitter electrode E via the body region 328 and the body contact region 334.
In the semiconductor device 15, the barrier region 340 that has a higher concentration of impurities than the drift region 326 is formed above this drift region 326. Consequently, the potential barrier formed in a boundary face between the barrier region 340 and the drift region 326 operates to suppress the hole carriers from escaping to the emitter electrode E. The barrier region 340 increases the density of the hole carriers within the drift region 326 (see FIG. 17). As a result, the concentration of hole carriers between the emitter and the collector electrodes increases, and the on-voltage of the semiconductor device 15 decreases. The barrier region 340 impedes the flow of the hole carriers from the drift region 326 to the emitter electrode E.